1. Field of the Invention
This invention relates generally to the testing of digital signal processing units and, more particularly, to exchange of data between digital signal processing unit under test and the emulation unit receiving the test signals. The cable connecting the digital signal processing unit and the emulation unit includes a pod for providing an interface between the two devices.
2. Background of the Invention
Referring to FIG. 1, a test configuration, according to the prior art, is shown. The configuration includes an emulation unit 10, a cable/pod unit 15, and a target processor 5. The emulation unit 10 includes a field programmable gate array 101 and a test bed controller 102. The cable/pod unit 15 includes a cable portion 152 with a 19-pin connector for coupling pod 151 to the emulation unit 10. The cable/pod unit 15 includes a cable portion 153 with a 14-pin connector for coupling the pod 151 to the target processor.
The operation of the test configuration can be understood as follows. The JTAG (Joint Test Action Group) instructions are applied from the test bed controller 102 to the field programmable gate array 101. The JTAG instructions (on five conductors) along with associated emulation control and timing instructions are then forwarded to the pod 15. The pod is comprised of discrete logic elements and forwards the JTAG instructions to the target processor 5. In the target processor, the JTAG instructions are executed and the resulting test data transmitted from the target processor 5 to the pod 15 and to the field programmable gate array 101 for appropriate distribution in the emulation unit for analysis.
While the test configuration shown in FIG. 1 has proven satisfactory for testing the target processor with JTAG protocols, the ability to use trace data to test and debug a target processor has become increasingly important. However, many users have an emulation unit that is being used to test the target processor with the JTAG protocol. It would be desirable to use as much of the existing test configuration as possible, but be able to respond to changes and upgrades in the testing function.
A need has therefore been felt for apparatus and an associated method having the feature of improving the test capabilities of the test configuration. It would be yet another feature of the apparatus and associated method to improve the test capabilities with minimal change to the emulation unit. It would be still another feature of the apparatus and associated method to provide a reconfigurable cable/pod unit. It would be a more particular feature of the present invention to permit the emulation unit to test a target processor with both JTAG procedures and with trace procedures. It is yet another more particular feature of the apparatus and associated method to provide an expanded pod-to-target cable portion to facilitate trace data information. It is still another feature of the apparatus and associated method to provide a pod that can provide an interface between the trace data generated by the target processor and applied to the emulation unit. It a further object of the apparatus and associated method to provide a cable/pod unit for simultaneously transferring JTAG and trace signals that is compatible with a cable/pod unit for transferring only trace signals and with transferring only JTAG signals.